Intel Nova Lake-S “bLLC” cache configuration has been detailed, revealing a maximum cache of 288 MB for the next generation desktop CPU.
Intel Nova Lake-S Desktop CPUs Will Feature Up to 288 MB of bLLC Cache, 80 MB More Than 9950X3D2
Once again, more Nova Lake-S CPU details have been revealed by Jaykihn, this time focusing on the bLLC part. While we know that the bLLC or Big Last Level Cache die variant will feature up to 144 MB in a single tile configuration and 288 MB in a dual tile configuration, an insider has spilled the beans about the maximum cache of each bLLC CPU.
Starting with the die configuration, Intel Nova Lake Desktop CPUs consist of five main die, featuring single compute tiles and dual compute tiles. The dual compute tile variant is labeled “DS” and will include the enthusiast model.

The most entry-level die is the 8C flavor with 4 P-Cores and 4 LPE cores. Followed by the 16C flavor with 4 P-Cores, 8 E-Cores, and 4 LPE Cores. Next are the two 28C variants, featuring 8 P-Cores, 16 E-Cores, and 4 LPE Cores. One of these models is based on a standard design, while the second packs a ‘bLLC” or large LLC (Last Level Cache). This bLLC variant is Intel’s answer to AMD’s X3D CPU, although it is not based on the same die stacking technology that AMD offers.
The “DS” dual compute tile variant includes only one configuration with the 52C model featuring two dies, each with 8 P-Cores and 16 E-Cores. The 4 LPE cores remain intact and do not see any doubling because they are not in the compute grid.
We know from previous reports that the single compute tile model ‘bLLC” will feature a 144 MB cache, while the dual compute tile model ‘bLLC” will feature a 288 MB cache. Standard compute tiles will measure 98mm2 while bLLC compute tiles will measure 154mm2.
Intel Nova Lake-S Desktop CPU Dead Configuration:
| Off Configuration | Variation | Core Configuration | LPE Core | Cache | CPU PCIe lane | GPU core |
|---|---|---|---|---|---|---|
| 8C | Single Compute Tiles | 4P+0E | 4LPE | Standard | 24 Generations5 | 2 Xe3 |
| 16C | Single Compute Tiles | 4P+8E | 4LPE | Standard | 24 Generations5 | 2 Xe3 |
| 28C | Single Compute Tiles | 8P+16E | 4LPE | Standard | 24 Generations5 | 2 Xe3 |
| 28C | Single Compute Tiles | 8P+16E | 4LPE | bLLC “Big LLC” | 24 Generations5 | 2 Xe3 |
| 52C | Dual Compute Tiles | 2x 8P+16E | 4LPE | bLLC “Big LLC” | 24 Generations5 | 2 Xe3 |
Now for SKUs, Intel will use the aforementioned Nova Lake dies to form the Core Ultra Series 4 Desktop lineup. Currently, the lineup is expected to include at least 13 models, ranging from Core Ultra 9, Core Ultra 7, Core Ultra 5, and Core Ultra 3 variants. Intel also has higher-end plans for its 52C die variants, which include 52-core and 44-core models.
This enthusiast model will feature a TDP of up to 175W. The rest of the product range scales from 35W to 125W. The entry-level Core Ultra 3 and Core Ultra 5 models will feature a TDP of 35W and up to 65W on the power-unlocked model. The standard lineup will feature a TDP of 125W with certain variants optimized for 65W power. There will also be an “F” model in the lineup with an iGPU-less design. Speaking of iGPUs, all Intel Nova Lake CPUs will feature 2 Xe3 cores, but there are plans to introduce a high-end iGPU in one of the Nova Lake SKUs.
Intel Nova Lake-S Desktop CPU SKUs (Intro via Videocardz):
| Model | Product ID | Core | Core Configuration | Cache Layout | Number of Cache | TDP/cTDP |
|---|---|---|---|---|---|---|
| Ultra X Core? | P3DX | 52 Core | 2x 8P+16E+(4LPE) | bLLC “Big LLC” | 288MB | 175W |
| Ultra X Core? | P2DX | 44 Core | 2x 8P+12E+(4LPE) | bLLC “Big LLC” | 264MB | 175W |
| Ultra Core 9 | P2D | 28 Core | 8P+16E+4LPE | bLLC “Big LLC” | 144 MB | 125W |
| Ultra Core 9 | P2K | 28 Core | 8P+16E+4LPE | Standard | TBD | 125W/65W |
| Ultra Core 9 | p2 | 22 Core | 6P+12E+4LPE | bLLC “Big LLC” | 108 MB | 65W |
| Ultra Core 7 | P1D | 24 Core | 8P+12E+4LPE | bLLC “Big LLC” | 132MB | 125W |
| Ultra Core 7 | P1K | 24 Core | 8P+12E+4LPE | Standard | TBD | 125W/65W |
| Ultra Core 7 | P1 | 16 Core | 4P+8E+4LPE | Standard | TBD | 65W/35W |
| Ultra Core 5 | MS2K/MS2KF | 22 Core | 6P+12E+4LPE | Standard | TBD | 125W/65W |
| Ultra Core 5 | MS2 | 12 Core | 4P+4E+4LPE | Standard | TBD | 65W/35W |
| Ultra Core 5 | MS1 | 8 Core | 4P+0E+4LPE | Standard | TBD | 65W/35W |
| Ultra Core 3 | T1 | 6 Core | 2P+0E+4LPE | Standard | TBD | 65W/35W |
Jaykihn revealed the cache details of five SKUs, which were discussed in a previous article. This includes two SKUs with dual compute tiles and three SKUs with single compute tiles. The SKUs and their maximum caches are listed below:
- Core Ultra X (52 Cores) – 288 MB
- Core Ultra X (44 Cores) – 264 MB
- Core Ultra 9 (28 Cores) – 144 MB
- Core Ultra 7 (24 Cores) – 132 MB
- Core Ultra 9 (22 Cores) – 108 MB
The dual compute tile SKU will be Intel’s answer to AMD’s dual 3D V-Cache models, such as the Ryzen 9 9950X3D2, which launches next week with 208MB of cache. The 264 MB Nova Lake SKU will offer 27% more cache, while the 288 MB Nova Lake SKU will offer 38% more cache. AMD will also likely pack more cache in its future X3D CPUs, so it’s likely we’ll see insane amounts of cache on consumer desktop platforms from both camps.
So what does all this mean? Looking at the Nova Lake Desktop CPU specifications and configurations, it looks like Intel is ready to return to the desktop platform. This means AMD will be better prepared with its next-gen Ryzen offerings.


And that means we’re in for an epic battle between the two chipmakers when their next-generation CPUs land on retail shelves. Intel and AMD still have a long way to go before we can see the next generation of CPUs in action. We’ll likely see some hints, teasers, concepts, and other official details throughout 2026, but this will be of interest to PC hardware enthusiasts, and hopefully also to those on a tight budget, who want the current PC crisis to end as soon as possible so they have time to prepare for newer improvements.
AMD Olympic Ridge vs Intel Nova Lake-S:
| CPU | Intel Core Ultra 400 | AMDRyzen 10000? |
|---|---|---|
| Family | Lake Nova-S | Olympic Ridge |
| Architecture | Coyote Bay (P-Core) Arctic Wolf (E/LP Core) |
Zen 6 |
| CPU Process | TSMC N2P | TSMC N2P |
| Number of Cores (Max) | 52 | 24 |
| Number of Threads (Max) | 52 | 48 |
| P-Core Max | 16 | 24 |
| E-Core Max | 32 | N/A |
| LP-E Core Max | 4 | N/A |
| Max Cache (L2+L3) | 160-320 MB | 96MB L3 |
| bLLC Cache Max | 144-288MB | 64 MB per stack? |
| DDR5 (1DPC 1R) | 8000 MT/sec CUDIMM – Yes |
7200 MT/s? CUDIMM – Yes |
| PCIe 5.0 Lane (Max) | 36 | TBD |
| PCIe 4.0 Lane (Max) | 16 | TBD |
| Socket Support | LGA 1954 | AM5 |
| Max TDP (PL1) | 125-175W | 125W+ |
| Max Power | ~700W (Double) ~350W (Single) |
TBD |
| Launch | 2H 2026 | 2H 2026 |
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