Intel patent for software defined as Core Super revealed a company approach to improve the performance of one threaded

Intel Patent EP4579444A1 shows how Intel is aimed at improving a single core performance without relying on fair hardware scaling.

Intel Files Patent for Software determined by Core Super; Smaller cores work together as a greater super core to improve its main performance

Intel’s latest patent shows that the company wants to improve its single CPU performance in a way that does not require it for the scale of hardware. Traditionally, the big core is mobilized in the CPU, which has its limits. One very large nucleus may have a reduced return, and instead of relying on smaller process nodes and higher frequencies, the new Intel EP4579444A1 patent shows how the company can overcome this challenge through what it calls SDC or super cores determined by software.

SDC is an Intel idea to take advantage of more cores than one large nucleus, but combine it virtually anytime needed. So, for example, two smaller cores can work together, not bigger ones by dividing the workload, with the aim of improving the performance of a significant one. However, this does come with various challenges, because dividing tasks in various cores while maintaining the order of the program is quite difficult. However, the new patent claims that SDC can maintain instructions in the correct order, while for software, it will still look like a larger nucleus that runs a single Utas.

With simple words, a job is assigned to two people, not one, but they both have the same task to complete it faster. This may look like multi-threading, but the purpose of SDC is to target the main operation of a single with this approach. This will not only collect IPCs to improve their main performance, but reportedly can do it without increasing the voltage or frequency. Through a dynamic fusion, every time a tougher single -face work needs to be executed, CPUs can make “super core” to complete work faster.

SDC basically involves the separation of instructions. First, divide the load in some smaller nuclei and then the core coordinates to maintain order. Then, through mechanisms such as shadow shop buffer, can ensure proper data transfer between the core. We will see how this works for Intel because there are still a number of challenges that must be passed by Intel, including synchronization complexity, because communication between low latency is very important, and the OS method recognizes and gives workload to the core activated by SDC.

News Source: Videocardz, Intel Patent